Fault-tolerant evolvable hardware using field-programmable transistor arrays

The paper presents an evolutionary approach to the design of fault-tolerant VLSI (very large scale integrated) circuits using EHW (evolvable hardware). The EHW research area comprises a set of applications where GA (genetic algorithms) are used for the automatic synthesis and adaptation of electronic circuits. EHW is particularly suitable for applications requiring changes in task requirements and in the environment or faults, through its ability to reconfigure the hardware structure dynamically and autonomously. This capacity for adaptation is achieved via the use of GA search techniques, in our experiments, a fine-grained CMOS (complementary metal-oxide silicon) FPTA (field-programmable FPGA transistor array) architecture is used to synthesize electronic circuits. The FPTA is a reconfigurable architecture, programmable at the transistor level and specifically designed for EHW applications. The paper demonstrates the power of EA to design analog and digital fault-tolerant circuits. It compares two methods to achieve fault-tolerant design, one based on fitness definition and the other based on population. The fitness approach defines, explicitly, the faults that the component can encounter during its life, and evaluates the average behavior of the individuals. The population approach, on the other hand, uses the implicit information of the population statistics accumulated by the GA over many generations. The paper presents experiment results obtained using both approaches for the synthesis of a fault-tolerant digital circuit (XNOR) and a fault-tolerant analog circuit (multiplier)

A Flexible Model of a CMOS Field Programmable Transistor Array Targeted for Hardware Evolution

Abstract. This article focuses on the properties of a fine grained reconfigurable transistor array currently under test at the Jet Propulsion Laboratory (JPL). This Field Programmable Transistor Array (FPTA), is integrated on a Complementary Metal-Oxide Semiconductor (CMOS) chip. The FPTA displrrys advantageous features for hardware evolutionary experiments when comparing to programmable circuits with a coarse level of granularity. Even though this programmable chip is configured at a transistor level, its architecture is flexible enough to implement standard analog and digital circuits ’ building blocks with a higher level of complexity. This model and a first set of evolutionary experiments have been recently introduced; here, the objective is further illustrating its flexibility and versatility for the implementation of a variety of circuits in comparison with other models of reconfigurable circuits. Some evolutionary experiments are also presented, serving as a basis for the authors to devise an improved model for the FPTA, to be manufactured in a near future.

INCREASING LENGTH GENOTYPES IN EVOLUTIONARY ELECTRONICS Ricardo Salem Zebulum

We investigate the use of Artificial Evolution with increasing length genotypes in Evolutionary Electronics. We demonstrate the need of using variable size genotypes in Evolutionary Electronics. After giving a brief description of our evolutionary methodology, we present a case study, consisting of the evolution of a combinational function. Finally, we make general observations about the methodology, addressing the problems of controlling the genotypes growth and selecting the genetic material used to increase the chromosomes. 1 Introduction Our work investigates the use of increasing length genotypes in the area of Evolutionary Electronics (Evolelec), which studies applications of Artificial Evolution in the design of electronic circuits. The use of increasing length genotypes seems to be the most natural evolutionary algorithm approach in Evolelec. Nevertheless, many problems arise when we apply this evolutionary approach, such as the genotypes growth control. Moreover, we have to r..

Increasing Length Genotypes In Evolutionary Electronics

We investigate the use of Artificial Evolution with increasing length genotypes in Evolutionary Electronics. We demonstrate the need of using variable size genotypes in Evolutionary Electronics. After giving a brief description of our evolutionary methodology, we present a case study, consisting of the evolution of a combinational function. Finally, we make general observations about the methodology, addressing the problems of controlling the genotypes growth and selecting the genetic material used to increase the chromosomes. 1 Introduction Our work investigates the use of increasing length genotypes in the area of Evolutionary Electronics (Evolelec), which studies applications of Artificial Evolution in the design of electronic circuits. The use of increasing length genotypes seems to be the most natural evolutionary algorithm approach in Evolelec. Nevertheless, many problems arise when we apply this evolutionary approach, such as the genotypes growth control. Moreover, we have to r..

Artificial Evolution of Active Filters: A Case Study

This article focuses on the application of artificial evolution to the synthesis of analog active filters. The main objective of this research is the achievement of a new class of systems, with advantageous features compared to conventional ones, such as lower power consumption, higher speed and more robustness to noise. The particular problem of designing the amplifier of an AM receiver is examined in this work. Genetic algorithms are employed as our evolutionary tool and two sets of experiments are described. The first set has been carried out using a single objective, the desired frequency response of the circuit. In a second set of experiments, three other objectives have been included in the system. A new multi-objective evaluation methodology was conceived for this second set of experiments. A second approach for evolving active filters, using programmable chips, is also discussed in this paper